热点资讯400 层堆叠 3D NAND 闪存将至，东京电子宣布开发出全新蚀刻技术
发布日期：2023-07-11 点击次数：52
IT之家 6 月 12 日消息，东京电子（TEL）近日宣布，已开发出一种用于存储芯片的通孔蚀刻技术，可用于制造 400 层以上堆叠的 3D NAND 闪存芯片。TEL 表示，该技术首次将电蚀刻应用带入到低温范围中，并创造性地发明了具有极高蚀刻速率的系统。
具体而言，这项新技术可以在短短 33 分钟内完成 10 微米深度的高纵横比（IT之家备注：纵横比是指晶圆上形成图案的深度与宽度之比）蚀刻，与此前的技术相比耗时大幅缩短。TEL 介绍，该技术的应用不仅有助于制造更高容量的 3D NAND，还能够将生产工艺中给全球变暖造成的风险减少 84%。
TEL 预告，研发团队将于 6 月 11 日-16 日在日本京都举行的 2023 年超大规模集成电路技术和工艺研讨会上发布最新成果和报告。
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